Who invented phase locked loop

This is a preview of subscription content, log in to check access. Pound, R. CrossRef Google Scholar. Vincent, J. Google Scholar. Appleton, E. Soc, Vol. Huntoon, R. Bode, H. Foster, D. Rideout, V. Bailey, F. Oliver, B. Figure 2. PLL Block Diagram. Additional Information Phase-lock looping is an extremely powerful synchronization technique when performing data acquisition because it allows multiple boards to lock to a shared reference signal.

As a result, these boards can synchronize the phase of their internal timebase and thus, their sample clocks. Because the phase of each sample clock is synchronized, each board can take a measurement at precisely the same instant. Open a service request.

Purchase or renew support services. This method of synchronous reception fails, however, when an AM signal with suppressed carrier is transmitted. Here the modulated signal is in phase with the suppressed carrier when the modulating signal is positive, but it is in antiphase with the carrier when the modulating signal is negative.

When this AM signal is fed to the input of a PLL, it would create a local carrier loc that is in phase with the carrier when the modulating signal is positive, but in antiphase with the carrier when the modulating signal is negative. Recovery of the modulating signal is therefore not possible. This problem has been solved by the invention of the Costas loop by American engineer James P. Costas in The Costas loop is able to lock onto a modulated signal also in cases where the carrier is suppressed.

When we compare the topology of a Costas loop with that of a PLL, we recognize that the PLL is built up from a cascade of three circuits: 1 a phase detector, 2 a loop filter, and 3 a voltage-controlled oscillator VCO. There is a feedback path from the output of the VCO to the input of the phase detector. In case of the PLL, the input signal is propagated through this cascade of three blocks.